In a Cell Based Design (CBD) process, pre-configured and pre-characterized circuit elements (referred to as “standard cells” or “cells”) are arranged on a die and are connected to each other to create a circuit design. In some cases, the circuit design will cause problems with electrical noise. For example, a conductive path or “line” connecting two elements may have a noise problem that results in a signal integrity failure. Note that the number of noise problems may increase with the complexity of the circuit and/or the size of devices in the circuit (e.g., smaller transistor sizes and line widths might result in more noise problems).
When a noise problem occurs, an engineer can manually analyze the circuit design and identify potential adjustments to solve the problem. The engineer might, for example, re-route one line so that it is further away from another line (e.g., if he or she thinks the noise problem is caused by cross-capacitance coupling). In a complex circuit design, however, there might be thousands of noise problems. In this case, it may be impractical to manually analyze each problem to identify an appropriate adjustment (e.g., because such an approach could take too long to complete).
A number of different types of adjustments can be made to address a noise problem. For example, a line could be re-routed or shielded, a driver could be down-sized or up-sized, and/or a buffer might be added to a line. Moreover, any adjustment that is made to improve a noise problem can potentially have adverse consequences in other parts of the circuit. For example, re-routing a line to solve a noise problem might cause a signal timing problem, a slope problem, or even another noise problem (e.g., in a neighboring line).